Innovative Design of 64bit Processing Unit with a Clock Gating Technique

Abstract

The design and Development of Arithmetic and Logical Unit is being in huge requirement. The Arithmetic and Logic operations are mostly done on the instructions fed by the system. The system is developed on the RISC method to ensure the best process in the Development of the processor. The processor which we have developed in has a power consumption of 80.94mW and the combinational delay of 24.841 ns. Which is less when compared to the previous existing system. This project is done with Modelsim and Altera Xilinx and developed with Verilog. This method provides a well-developed inputs to the system and processes it efficiently.