Efficient Architecture of 1D-DWT based ECG Classifier using Array Multiplier

Abstract

The market for reduced portable devices used for tracking vital signals such as ECG has been great in recent years. VLSI's technological progress has had an enormous effect on biomedical signal processing. The high-speed VLSI circuits can be built to use less space and power. A DWT (1D-DWT, 2D-DWT, and 3D-DWT) for DSP and image transformation applications is widely in use. The transform can be one dimensional, two-dimension and three-dimensional. The one-dimensional, discrete wavelet transform (1D-DWT) provides less image resolution and also a high processing time. 1D-DWT is used for ECG signal classification. An efficient architecture based on effective multiplier and adder components is presented in this paper. The obtained results proved that if array multiplier and RCA adder are used as components in 1D-DWT then hardware performance in terms of area, power and delay is achieved. The proposed design is 24.55 % area and 45.82 % power efficient compared to that of existing design which fulfils the efficient architecture requirement for ECG classification.