Design of Posit Multiplier Using Rounding Technique for Signed and Unsigned Data Operations in Dsp Applications

  • K.Divyalakshmi, S.Sharmilabanu, P.Swetha, S.Jabeen

Abstract

The IEEE Standard for Floating-Point Arithmetic (IEEE 754) has been for decades the standard for floating-point arithmetic and is implemented in a vast majority of modern computer systems. Recently, a new number representation format called posit (Type III unum) introduced by John L. Gustafson who claims this new format can provide higher accuracy using equal or less number of bits and simpler hardware than current standard – is proposed as an alternative to the now omnipresent IEEE 754 arithmetic. In this Bachelor dissertation, the novel posit number format, its characteristics and properties presented in literature are analyzed and compared with the standard for floating-point numbers (floats). Based on the literature assertions, we focus on determining whether posits would be a good “drop-in replacement” for floats. First we propose a low-level design for posit arithmetic multiplier using the Xilinx tool to generate synthesizable HDL code which helps in the case of only unsigned numbers of multiplication. Where as in the practical, we need to focus on both signed and un-signed numbers. So here we proposed a new technique called RoBA (Rounding Based Approximate) multiplier which helps in reducing the area, delay and power by 10%, 40% and 54% respectively. To conclude this work, we propose a low-level design for posit arithmetic (signed and un-signed) RoBA multiplier using the Xilinx tool to generate synthesizable HDL code.  Designed using XilinxISE14.7 software.

Published
2021-10-23
How to Cite
K.Divyalakshmi, S.Sharmilabanu, P.Swetha, S.Jabeen. (2021). Design of Posit Multiplier Using Rounding Technique for Signed and Unsigned Data Operations in Dsp Applications . Design Engineering, 6589 - 6595. Retrieved from http://www.thedesignengineering.com/index.php/DE/article/view/5633
Section
Articles