Design and Analysis of 14T SRAM Cell with Dual Threshold Method and Modified Lector Approach

Abstract

Natural varieties and testing spillage control in the present mass Si MOSFETs limit the scaling of SRAM. Plan tradeoffs in 14-semiconductor SRAM cells are introduced in this work with double edge and altered LECTOR approach. FinFETs are promising gadgets for past CMOS nanoelectronics because of they are having great transport properties and potential for enormous scope preparing and creation. This examination fundamentally focuses on plan of SRAM cell with double edge esteem thought and 14 semiconductors will be utilized for the plan. Reenactment results show that though circuits using FinFETs guarantee better, lower energy utilization, and equivalent dependability at comparable working focuses to scaled circuits, they are more defenseless to varieties and deformities. These outcomes shows that the FinFETs are far better than CMOS in terms of power.