Comparative AHB AMBA 2.0 and AXI 4.0 Implementations in SOC Design

  • Hitanshu Saluja, Dr. Naresh Grover
Keywords: AMBA 2.0, AXI4.0, SoC etc.

Abstract

This article describes an AMBA 2.0 and AXI 4.0 implementation in SOC design which reduces the limitations of communication by reducing data rates. Proposed design also added a DDR3 controller, which is a high-performance device and offers high bandwidth through low power consumption. It has also been observed that in multiple master systems AMBA 2.0 protocol supports an arbitration technique which makes the overall system complex and perfect parallelism cannot be achieved through it because at a time only master is allowed to communicate with one slave. A single centralized bus for all functional block can also constitute a bottleneck. The proposed system will work on both AMBA 2.0 and AXI 4.0 protocols with memory controller interface. AXI 4.0 protocol supports different IDs and channel handshaking instead of arbiter. In AXI 4.0 five individual transfer channels is proposed to communicate in multiple master and multiple slave systems so that multiple masters can communicate simultaneously with multiple slaves and perfect parallelism is achieved.

All the control circuitry is synthesized using Xilinx 13.1 and simulation waveforms are achieved by using Modelsim 6.5e.

Published
2021-08-11
How to Cite
Dr. Naresh Grover, H. S. (2021). Comparative AHB AMBA 2.0 and AXI 4.0 Implementations in SOC Design. Design Engineering, 7954- 7966. Retrieved from http://www.thedesignengineering.com/index.php/DE/article/view/3314
Section
Articles