Second Order Continuous Time Incremental Sigma-Delta Modulator Based Analog-To-Digital Converter
Abstract
Novel VLSI system design has shown vital role in wide variety of neural recording network models. In the front end, an analog-to-digital converter (ADC) is a major block in neural recording system. The speed and resolution of ADC are affecting the neural recording process while acquiring neuro potentials. The power consumed with ADC block is higher compared to other blocks. This paper suggests second order continuous time incremental sigma-delta (CTIΣ∆) analog-to-digital converter for neural recording applications, which has low power consumption and high resolution as well as faster conversion time. The sigma-delta modulation is achieved by using a dynamic summing comparator, which reduces the signal swing by incorporating cascaded integrators in forward path. However, performance degradation is expected to increase, which is overcome with adjustment of coefficients. The proposed structure is designed in 180nm CMOS process and simulated for transient and power analyses